xbeaver bus mappers/extenders

Bus extenders extend the xbeaver backplane allowing additional peripherals to be controlled.

Instantiation

The external class bus mapper, which uses a device driver such as /dev/port to access peripherals, is added to the emulation using the line:-: board <port-address> extbus <target-base> <map-length> <options> <device-name> [<port=value>]
The parport class bus mapper, which uses the PC parallel port and custom hardware to perform bus cycle, is added to the emulation with the line:-: board <port-address> pptbus <target-base> <map-length> <options> <device-name> [<port=value>]
The spioutput class bus mapper is added to the emulation using the line:-: board <port-address> spibus <target-base> <map-length> <options> <device-name> [<port=value>]
The internal class bus mapper is added to the emulation using the line:-: board <port-address> intbus <target-base> <map-length> <options> <bus-name> [<port=value>]
The vcmaster class bus mapper, which uses a serial port or the tcp network to access a remote bus, is added to the emulation using the line:-: board <port-address> vcmbus <target-base> <map-length> <options> <bus-name> [<protocol> <protocol_args>]
Finally a generic bus mapper that can be used to create a bus of any class is added using the line:-: board <port-address> genbus <bus-class> <target-base> <map-length> <options> <bus-name> [<as above>]

Options

Option	Description
I	External Bus inverts data on read and write
H	High 8 bits of Z80 i/o address used as port address
X	High 8 bits of Z80 i/o address passed through to high 8 bits of target address
S	Local bus is mapped as separate address/data pair
M	Target bus is mapped as address/data pair
N	Short address setup not permitted (With option S)
Z	Short address setup is based at address zero (With option S)
P	Set targetting address to 10 bits (0x000..0x3ff)
L	Set targetting address to 16 bits (0x0000..0xffff)
LP	Set targetting address to 24 bits (0x000000..0xffffff)
R	Allow target reads
W	Allow target writes
T	Trace IO cycles

IO Ports

When option S is used:-

Offset	Access	Function
Offset	Access	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
0	R/W	Address register
1	R/W	Data register

When option H is used:-

Offset	Access	Function
Offset	Access	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
0	R/W	Data register

Otherwise:-

Offset	Access	Function
Offset	Access	Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
0..<map-length-1>	R/W	Access to target bus

Board names and Bus Classes

Note that board names are used with the board configuration command, while class names are used within a board definition. There is a one-to-one relationship between these names, however it is important not to confuse them.

Board Name	Class Name
extbus	external
pptbus	parport
spibus	spioutput
intbus	internal
vcmbus	vcmaster